In this paper the impact of the endurance degradation on the programming window and the energy consumption of Flash floating gate memories is investigated. We use TCAD simulations to confirm, predict and explain the behavior we have observed in previous experimental studies. These simulations have been developed for 90nm technology node Flash floating gate memories, but they are fully compatible with highly scaled devices. The use of interface traps in the simulation enables to reproduce the increase in the drain current consumption and the decrease in the programming efficiency after endurance degradation. Moreover, we highlight the fact that after degradation the hot electrons energy and velocity are lower, decreasing the electrons injection in the floating gate.